Article ID Journal Published Year Pages File Type
548591 Microelectronics Reliability 2006 11 Pages PDF
Abstract

This paper deals with placing chips on an MCM substrate in chip array style for minimizing the system failure rate. The placement procedure begins with constructing an initial placement based on cooling considerations. Then, a thermal-force model is presented to transform the reliability-driven placement problem to solve a set of simultaneous nonlinear equations to determine thermal-force-equilibrium locations of the chips. A modified Newton–Raphson method is used to solve this system of equations. Finally, a chip assignment procedure transforms the thermal-force-equilibrium placement into an array style placement for minimum thermal distortion. Two assignment methods are developed and compared each other. Experiments on three industrial MCMs designed by IBM show that the obtained placements have significant improvements to their original designs in system reliability. Additionally, a simulated annealing approach is presented for justifying the performance of the proposed method.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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