Article ID Journal Published Year Pages File Type
548841 Microelectronics Reliability 2016 7 Pages PDF
Abstract

•Cu nanoparticles were sintered between Si chip and Ni-plated ceramic substrate.•Cu layer was stressed by applying multiple thermal cycles.•Degradation of Cu layer was studied by synchrotron radiation computed laminography.•Cracks slowly propagated in thickness direction from ceramic substrate to Si chip.

The degradation process in a sintered Cu nanoparticle layer was studied by synchrotron radiation computed laminography (SRCL), which allows the high-resolution nondestructive observation of internal cracks in flat devices. A Cu layer was produced by sintering Cu nanoparticles between a Si chip and a direct bonded aluminum (DBA) substrate. This layer was then stressed by applying multiple thermal cycles, after which SRCL measurements were repeatedly performed. Images of the distributions of sintered Cu densities reconstructed from the SRCL observations show cracks with tortuous shapes generated around the dense Cu nanoparticles; these cracks propagated along the direction from the DBA substrate to the Si chip during thermal stress testing. Whereas crack propagation in typical soldering materials occurs along grain boundaries, the similar process in Cu nanoparticle layers is regulated by their sintered density distributions.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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