Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
549781 | Microelectronics Reliability | 2006 | 23 Pages |
Abstract
An overview of the evolution of transistor parameters under negative bias temperature instability stress conditions commonly observed in p-MOSFETs in recent technologies is presented. The physical mechanisms of the degradation as well as the different defects involved have been discussed according to a systematic set of experiments with different stress conditions. According to our findings, a physical model is proposed which could be used to more accurately predict the transistor degradation. Finally, based on our new present understanding, a new characterization methodology is proposed, which would open the way to a more accurate determination of parameter shifts and thus allowing implementing the degradation into design rules.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
V. Huard, M. Denais, C. Parthasarathy,