Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6878834 | AEU - International Journal of Electronics and Communications | 2018 | 12 Pages |
Abstract
An ultra-low power, self-start-up switched-capacitor Two Branch Charge Pump (TBCP) circuit for low power, low voltage, and battery-less implantable applications is proposed. In order to make feasible the low voltage operation, the proposed charge pump along with Non-Overlapped Clock generator (NOC) are designed working in sub-threshold region by using body biasing technique. A four-stage TBCP circuit is implemented with both NMOS and PMOS transistors to provide a direct load flow. This leads to a significant drop in reverse charge sharing and switching loss and accordingly improves pumping efficiency. A post-layout simulation of designed four-stage TBCP has been performed by using an auxiliary body biasing technique. Consequently, a low start-up voltage of 300â¯mV with a pumping efficiency of 95% for 1â¯pF load capacitance is achieved. The output voltage can rise up-to 1.88â¯V within 40â¯Î¼s with 0.2% output voltage ripple in case of using 400â¯mV power supply. The designed circuit is implemented by 180-nm standard CMOS technology with an effective chip area of 130.5â¯Î¼mâ¯Ãâ¯141.8â¯Î¼m while the whole circuit consumes just 3.2â¯Î¼W.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
N. Cheraghi Shirazi, A. Jannesari, P. Torkzadeh,