Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6879159 | AEU - International Journal of Electronics and Communications | 2018 | 18 Pages |
Abstract
In this paper, memristor emulator circuit consisting of only seven MOS transistors and one grounded capacitor is presented. Memristors exhibit nonlinear voltage-current relationship and many previous emulator circuits have multiplier circuit to provide the nonlinear characteristic of the memristor. But there is no any multiplier circuit block in the proposed circuit so the proposed memristor circuit occupies low chip area. The memristor circuit is laid by using Cadence Environment with TSMC 0.18â¯Âµm process parameters and its layout dimensions are only 12â¯Âµmâ¯Ãâ¯38â¯Âµm excluding the area of the capacitor. The post-layout simulation results for memristor are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner, and radical temperature changes. All post-layout simulations agree well with theoretical analyses. Besides the VLSI implementation of the memristor, the proposed circuit is built on the breadboard using discrete circuit elements.
Related Topics
Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Abdullah Yesil,