Synthesis of a reconfigurable analog vector-sum circuit into the MTL-Based configurable blocks

A reconfigurable and programmable implementation of an analog vector summation circuit using an MTL-based synthesis scheme is proposed. This reconfigurable structure, gives the flexibility to program the dimension and gain of the vector-sum function after chip fabrication. This scheme only utilizes squaring blocks to implement the vector-sum function, eliminating the square-root function typically required. The proposed structure utilizes cascoded MTL cells (CMC), a current mirror, and a programmable PMOS array. It is a flexible and reconfigurable structure with capability of implementing nonlinear analog functions such as required squaring function. The proposed approach is capable to realize one-dimensional (absolute-value) to n-dimensional vector-sum functions. The programmable gain factor applied to the implemented functions, is useful for normalization, attenuation and amplification. The theoretical analysis and measurement results verify the feasibility of the proposed reconfigurable vector-sum concept. The prototype device has been fabricated and tested in a 0.5μm CMOS technology. As two applications, a programmable full-wave current rectifier along with a frequency doubler have been programmed and tested using the proposed vector-sum circuit.