Single event transients mitigation techniques for CMOS integrated VCOs

Single event transients (SETs) in analog integrated circuits result from the interaction of a heavy ion or high-energy proton with a sensitive p-n junction. SETs induce electron-hole pairs that can lead to current spikes, which propagate through the integrated circuit and can result in substantial transient peaks at the output voltage. This paper proposes techniques to mitigate SETs in CMOS voltage controlled oscillators (VCOs) without affecting circuit specifications. A VCO was designed to meet the IEEE 802.15.4 specifications. First, the weakest nodes were detected, and then particle strikes with a LET ranging from 14.47 to 57.86 MeV cm2 mg−1 were applied at these nodes. Amplitude variation, recovery time and phase shift were obtained at the output nodes. RHBD techniques are discussed and applied to redesign the VCO. The proposed mitigation techniques reduce the recovery time by approximately 59%, the output phase displacement by 74.2% and the amplitude variation by 96.7%.