Article ID Journal Published Year Pages File Type
6945314 Microelectronics Journal 2016 12 Pages PDF
Abstract
This paper presents a fifth-order dual-notch low pass filter oriented to portable Electroencephalogram (EEG) detection system. The proposed filter is based on active realization of LC ladder topology using digitally programmable balanced output operational transconductance amplifiers (DPOTAs). This filter is utilized to reject the effect of the powerline interference at 50 Hz. Furthermore, it diminishes the frequencies beyond 150 Hz, which removes the third harmonic generated due to the fundamental frequency of the powerline interference. Since our objective to have small cutoff frequency less than 50 Hz, the designed filter must have very low transconductance value (Gm in the order of a few nA/V). This will lead to minimizing the overall area and relaxing the associated capacitance values. Based on this, PSpice simulation results using 0.25-µm CMOS technology operating under ±0.8 V voltage supply are also given. The fully differential fifth-order dual-notch LPF provides post layout simulation results (for Gm=4 nA/V) as follows: THD of 0.0002% for 10 μVp-p at 30 Hz sinusoidal input, input referred noise spectral density of 13 μV/√Hz at the passband frequencies, total standby power consumption of 51.8 μW, and the notch depths of 59 dB attenuation around 50 Hz and 40 dB attenuation around 150 Hz. The overall performance makes this filter deserved to be used in aggressive EEG detection systems.
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