Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6945415 | Microelectronics Journal | 2016 | 7 Pages |
Abstract
This paper presents an area efficient implementation of a second order continuous time (CT) sigma-delta (ΣÎ) modulator. In the proposed implementation, traditional operational amplifiers (op-amps) have been replaced by a low-complexity current mode structure based on local feedback to obtain power and area efficiency. The ΣΠmodulator specifications have been set for a passive RFID tag with sensing capability application, so that achieving minimum active area and very low power consumption are the main goals of the presented design. Experimental results show 8.75 bits of Effective-Number-Of-Bits (ENOB) in a 25 kHz signal bandwidth with only 3.8 μW of power consumption operating at 1.7 V of supply voltage. A Figure Of Merit (FOM) of 175 fJ/level has been achieved with total area occupancy (without pads) of 150 μmÃ125 μm in a 0.35 μm CMOS technology.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
E. López-Morillo, F. Muñoz, A. Torralba, J. Galán, F. Márquez, R.G. Carvajal,