Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6945658 | Microelectronics Reliability | 2018 | 7 Pages |
Abstract
Due to configurability feature and increasingly complex architecture, FPGAs have brought advantages to many applications such as avionics and safety critical aerospace, allowing in system reconfiguration after launch. Commercial FPGAs suffer from radiation-induced failures, which are provoked by high-energy particles in space; for this reason, fault tolerant techniques are necessary to harden these devices. This paper presents a design of a fault tolerant multicore processor architecture based on a novel modular voting strategy that fits in FPGAs and System-on-Chip (SoC) devices with an even number of processors. This architecture is implemented within a Commercial off-the-shelf (COTS) SoC that will allow to be used safely in space missions. To harden the fault tolerance of the embedded multicore processor architecture different fault tolerance techniques are combined.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Jesús Tabero, Alberto RegadÃo, César Pérez, Jesús Pazos, Pedro Reviriego, Alfonso Sánchez-Macian, Juan Antonio Maestro,