Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6945794 | Microelectronics Reliability | 2018 | 9 Pages |
Abstract
BTI has long been a concern for transistor reliability, and as such garnered significant attention for process optimization and qualification. Typically, the details of a given technology are reported in the literature at the time of qualification. However, not much attention is paid to the larger trends that emerge generation to generation. In this work, we describe the trends when scaling from the 90â¯nm to 14â¯nm technology nodes, detail the implications of scaling and architecture changes, as well as discuss the challenges associated with modeling BTI as technologies evolve.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
S.M. Ramey, C. Prasad, A. Rahman,