Framework for thermal-aware verification of digital and mixed signal systems

The evolution of the semiconductor manufacturing allows the integration of more features, such as transistors, onto a single die which further increases the complexity of the chips and introduces new design challenges at each process node. Power density has reached the limits of available cooling solutions, thus thermally-aware design decisions are needed early in the design process. Co-simulating the logic function and thermal behavior of the design can help to evaluate the performance of the system at various higher abstraction levels across the different stages of the design process. Logi-thermal simulators use the switching activities of the system to predict the dissipated power and from that calculate the temperature distribution across the chip. The temperature dependence of certain parameters (such as delay) and temperature sensitive analog/mixed signal components can also be considered during the co-simulation. This paper presents a thermal-aware co-simulation environment to allow the temperature effects to be considered in various steps in the mixed signal SoC design flow.