| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 6946551 | Microelectronics Reliability | 2015 | 5 Pages |
Abstract
Applied to MOSFETs experiencing Hot Carrier Stress, the proposed methodology provides deeper insights into the relationship between stress-induced defects location and their impact on electrostatic and transport degradations.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Giulio Torrente, Jean Coignus, Sophie Renard, Alexandre Vernhet, Gilles Reimbold, David Roy, Gerard Ghibaudo,