Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6946977 | Microelectronics Reliability | 2012 | 7 Pages |
Abstract
Aim of this work is to give a complete overview of Flash memory cell reliability issues. The main physical mechanisms occurring during operating conditions are reviewed for understanding the technological limits of these memories. In particular, stress induced leakage current causes problems of single bit charge loss at room and at high temperature after cycling, while charge trapping and de-trapping degrade performance and operative memory window. Also random telegraph noise degrades memory window and process optimization has to be considered. The investigation of the physical mechanisms behind allows improving memory reliability giving suggestion for tunnel oxide quality optimization. In particular, tunnel oxide nitridation will be deeply investigated.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
G. Ghidini,