Analysis and modeling of the gate leakage current in advanced nMOSFET devices with severe gate-to-drain dielectric breakdown

The gate leakage current in advanced metal gate/high-K (EOT ≈ 0.6 nm) nMOSFETs with severe gate-to-drain dielectric breakdown is investigated in detail. Even though several models have been proposed in the past to deal with this issue, they are mainly intended to be used in circuit simulation environments. On the contrary, we report in this work an analytic expression for the gate current based on the solution of the generalized diode equation. The model has been tested not only for positive drain and gate voltage conditions but also for negative biases.