Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9672180 | Microelectronics Reliability | 2005 | 6 Pages |
Abstract
Stressed deep trench capacitors of Dynamic Random Access Memories (DRAM) were analyzed regarding the localization within a test array. A preparation method to find the position within the failing trench and to give information for process improvements is reported. Differences between the dielectrics nitride/oxide and aluminumoxide were seen. The investigations were done mostly for trench geometries of a 110nm technology. One first preparation was also successful for a 90nm technology with enlarged trench surfaces by hemispherical silicon grains ( HSG ).
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Authors
G. Neumann, J. Touzel, R. Duschl,