Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9672190 | Microelectronics Reliability | 2005 | 4 Pages |
Abstract
As the printed wiring density on organic substrate is increasing, the line width and spacing are reducing toward 25 μm and below. Present method of fault isolation will no longer be adequate, and capacitive voltage contrast method is proposed. The feasibility of the voltage contrast method is demonstrated, and the various key parameters for better contrast are identified and determined. Circuit model is developed to explain the experimental results and the significance of the various key parameters.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Cher Ming Tan, Kim Peng Lim, Tai Chong Chai, Guat Cheng Lim,