Article ID Journal Published Year Pages File Type
9672251 Microelectronics Reliability 2005 7 Pages PDF
Abstract
Up to now, ESD damage is understood to be induced via device pads and to be avoided by means of appropriate protection structures located at these pads. The ESD susceptibility is classified by means of standardized stress tests. This paper shows, that with increasing importance a variety of post-wafer manufacturing and packaging processes may create a new type of evident and latent ESD damage in the device. We define this phenomenon as ESD-from-outside-to-surface (ESDFOS), as charged handlers cause discharges directly from outside into the device surface. Classical ESD tests do not cover this mechanism. The paper describes the phenomenon, its root causes, and gives practical hints for analysis and prevention.
Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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