| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 9672299 | Microelectronics Reliability | 2005 | 4 Pages |
Abstract
The paper focuses on the study of charge trapping processes in non-volatile memory metal-oxide-silicon (MOS) structures with Si nanocrystal floating gate formed by Si ion implantation. Careful electrical studies of the MOS structures based on the analysis of the capacitance-voltage (C-V) characteristics during pulse charge injection in the oxide enabled the distinguishing of the electron emission from the nanoclusters and the charge trapping in structural defects of the dioxide matrix. The trapping model is discussed.
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Authors
V.I. Turchanikov, A.N. Nazarov, V.S. Lysenko, Josep Carreras, B. Garrido,