| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 9672317 | Microelectronics Reliability | 2005 | 4 Pages |
Abstract
We investigate the influence of the used cleaning method and rapid thermal annealing (RTA) conditions on the electrical characteristics of MIS devices based on SiNy:H/SiOx dielectric stack structures fabricated by electron-cyclotron-resonance plasma assisted chemical vapour deposition (ECR-CVD). We use capacitance-voltage (C-V) technique to study charge trapped in the insulator, Deep Level Transient Spectroscopy (DLTS) to study the trap distributions at the interface, and conductance transient (G-t) technique to determine the energy and geometrical profiles of electrically active defects at the insulator bulk as these defects follow the disorder-induced gap state (DIGS) model.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
S. Dueñas, H.Castán H.Castán, H. GarcÃa, J. Barbolla, E. San Andrés, I. Mártil, G. González-DÃaz,