A structure oriented compact thermal model for multiple heat source ASICs

This paper proposes a methodology for the extraction of a compact thermal model for multiple heat source devices, which can be used for estimation of the overall temperature field. This extraction is based on the physical parameters as well as on the layout and the packaging of the device. The model directly represents the regions surrounding a source by a resistance network containing the specific parameters of source and chip in analytical form, so that it is easy to vary parameters like power dissipation and thermal conductivity within a wide range. In order to obtain a good and fast approximation of the continuous case, the shape of the volume elements represented by a node in the network is chosen regarding the direction of the heat flow within these elements. Therefore these volume elements are not rectangular but pyramid- or parallelogram-like structures. The temperature fields of multiple sources add up for the total temperature distribution, by the use of a matrix field representation.