Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
11020956 | Integration, the VLSI Journal | 2018 | 7 Pages |
Abstract
The development of 5G communication systems is underway. When employing 64 QAM, very low phase noise levels are required to limit EVM - i.e. less than â117â¯dBc/Hz at 1â¯MHz offset from fâ¯=â¯20â¯GHz. In this paper, the challenges of achieving such a low phase noise are discussed in detail. The choice between CMOS vs BJT devices is investigated and the impact of the base resistance intrinsic in BJT-based VCOs is addressed. BJT-based VCO shows â¼2â¯dB better phase noise when compared to CMOS-based VCO and low supply is employed. When higher supply is leveraged, BJT-based VCO advantage is kept while CMOS-based VCO is not able to reach the targeted tuning range due to thick-oxide devices parasitics. Emphasis is on the minimization of L/Q inductor versus quality factor ratio, to further minimize phase noise. Prototypes in a 55â¯nm BiCMOS technology were operated at 2.5â¯V supply with the largest amplitude allowed by reliability constraints. Measurements show a phase noise as low as â119â¯dBc/Hz at 1â¯MHz from a 20â¯GHz carrier offset with a tuning range (TR) of 19% and FoMâ¯=â¯â187â¯dBc/Hz. Power consumption is 56â¯mW. To the best of authors' knowledge, the presented VCO shows the lowest reported phase noise among state-of-the-art BiCMOS VCOs with TR>10%.
Keywords
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Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Niccolò Lacaita, Matteo Bassi, Andrea Mazzanti, Francesco Svelto,