Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
4970738 | Integration, the VLSI Journal | 2017 | 10 Pages |
Abstract
Scan design has become another side channel of leaking confidential information inside cryptographic chips. Methods based on obfuscating scan chain order have been proposed as countermeasures for such scan-based attacks. In this paper, we first analyze the existing secure scan designs from the angle that whether they need a complete chain state or rely on any specific scan chain order. We show that all existing attacks do not rely on specific scan chain order and therefore any secure scan design with obfuscated scan chain order cannot provide sufficient security. We then propose a new approach which clears the states of all sensitive scan cells whenever the circuit under test is switched to test mode. It will also block the access to cipher key throughout the entire testing process. Our experimental results show that the proposed scan design can effectively insulate all the information related to cipher key from the scan chain with little design overhead, thus it can successfully defend all the existing scan-based attacks.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Aijiao Cui, Yanhui Luo, Huawei Li, Gang Qu,