Highly reliable and low-power magnetic full-adder designs for nanoscale technologies

The MTJ-based circuits have been considered as a candidate for next generation digital integrated circuits thanks to their attractive features such as nonvolatility, low leakage current, high endurance, and CMOS integration compatibility. However, incurred energy and delay by reconfiguration of their employed conventional MTJs limit their application. Besides, the issue of read-disturbance is another challenge in such MTJ-based circuit designs. In this article, a new magnetic-based full-adder (MFA) circuit based on a new three-terminal two-in-one magnetic tunnel junction (TIO-MTJ) cell is proposed. Comparing with the previous MFA circuits, the proposed circuit offers a lower energy for the write operation and also a disturbance-free reading. Two improved structures based on the proposed MFA are also suggested to obtain the advantages of nonvolatility for the power-gating architectures and also radiation hardening for the radiation harsh environments.