Article ID Journal Published Year Pages File Type
4971803 Microelectronics Reliability 2016 6 Pages PDF
Abstract
For the technologies considered in this paper, on the one hand we demonstrate a maximal threshold voltage drop of 2 V for a 4 Gbit Flash array and we provide design recommendations, and on the other hand we demonstrate that a maximal word length of 32 bits for ReRAM can be achievable in a ReRAM matrix. The presented methodology can easily be extended to any memory technology.
Keywords
Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
Preview
Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories
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