Article ID Journal Published Year Pages File Type
538715 Integration, the VLSI Journal 2007 11 Pages PDF
Abstract

We discuss a novel method for identifying test requirements of modules in a hierarchical design in order to facilitate the construction of cost-effective hierarchical test paths. Unlike current practices, which construct very general paths capable of justifying all vectors and propagating all responses to and from each module in the design, test requirements in our method are defined as a set of fine-grained input and output bit clusters and pertinent symbolic values. These test requirements reflect the inherent connectivity and regularity of each module and, when supported by corresponding hierarchical test paths, they guarantee complete testability of the module. Their key advantage is that they are not fully specified test vectors and, therefore, they do not require a computationally expensive search algorithm to satisfy from the primary inputs and outputs of the circuit. At the same time, they are also not arbitrarily general and, therefore, they do not impose overly strenuous transparency requirements on the surrounding modules, which could require excessive design-for-testability hardware. In essence, they combine the generality required for fast hierarchical test path construction with the precision necessary for minimizing the incurred cost, thus fostering cost-effective hierarchical test.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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