Article ID Journal Published Year Pages File Type
540192 Integration, the VLSI Journal 2009 11 Pages PDF
Abstract

A highly integrated, low-power GALILEO/GPS front-end for the new generation of positioning services has been designed using a 0.35 μm SiGe process. First an analysis of the current and future GPS and GALILEO signals is presented in order to show the interoperability between both systems and to set the requirements for the entire front-end. The receiver has been implemented using a 6 MHz bandwidth low IF architecture whose IF frequency is 4.092 MHz after digitalization. The ESD protected RF front-end exhibits a voltage gain of 103 dB and an SSB noise figure of 3.7 dB, which makes it suitable for high-sensitivity applications. The achieved power consumption is only 66 mW from a 3 V voltage supply and 38 mW if the internal dual-gain LNA is switched off with no compromise with performance and with a minimal amount of external components.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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