| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 541055 | Integration, the VLSI Journal | 2010 | 7 Pages |
Abstract
This paper discusses the design, analysis and performance of a 2.4 GHz fully integrated low-power current-reused receiver front-end implemented in 0.18 μm CMOS technology. The front-end is composed of a single-to-differential low-noise amplifier (LNA), using high-Q differential transformers and inductors and a coupled switching mixer stage. The mixer transconductor and LNA share the same DC current. Measurements of performance show a conversion gain of 28.5 dB, noise figure of 6.6 dB, 1 dB compression point of −32.8 dBm and IIP3 of −23.3 dBm at a 250 kHz intermediate frequency, while dissipating 1.45 mA from a 1.2 V supply.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Ignacio Gil, Ignasi Cairó, Javier J. Sieiro, José M. López-Villegas,