A Verilog-AMS photodiode model including lateral effects

The market of CMOS image sensors is rapidly gaining an importance since optoelectronic devices are present in an increasing number of electronic systems. Therefore, accurate scalable optoelectronic models for photodetectors are necessary to predict their behaviour by circuit simulation. Hardware description languages (HDLs) offer an effective and efficient way to describe these systems. In this work, a Verilog-AMS model for the photoresponse of a CMOS photodiode including lateral effects is presented and a simplified equivalent electrical circuit of the photodiode is used to simulate two different pixel cells in Cadence framework.

► A Verilog-AMS CMOS photodiode model including lateral effects is implemented. ► Capacitance model is included to study the response in the dynamic operation regime. ► The model is tested in Cadence framework for circuit simulation purpose. ► 3T-APS and logarithmic APS pixel cells are simulated. ► The photodiode size can be optimized to obtain the required response.