Article ID Journal Published Year Pages File Type
542930 Integration, the VLSI Journal 2008 10 Pages PDF
Abstract

Dual Forms of Reed–Muller (DFRM) are implemented in OR/XNOR forms, which are based on the features of coincidence operation. Map folding and transformation techniques are proposed for the conversion between Boolean and DFRM expansions. However, map techniques can only be used for up to 6 variables. To overcome the limitation, serial tabular technique (STT) and parallel tabular technique (PTT) are proposed. STT deals with one variable at a time while PTT generates terms in parallel. Both tabular techniques outperform significantly published work in terms of conversion time. Methods based on on-set canonical sum-of-products minterms and canonical product-of-sums maxterms are also investigated.

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