System efficient ESD design

System-level ESD robustness is a crucial feature for any electronic system. To achieve the required level of robustness at the lowest cost a design concept is applied which assures matching between PCB protection components and IC IO behaviour under system ESD discharge. It is now widely referred to as system efficient ESD design (SEED).A thorough characterization of the high current behaviour of IO circuit and on-board protection elements provides the necessary data for a simulation based co-design of on-chip and on-board protection measures. The constraints for characterization and modeling are discussed. Applying this methodology allows the development of a cost optimized system-level ESD protection throughout the stages of a system design.