Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
546821 | Microelectronics Journal | 2016 | 10 Pages |
Abstract
The design of a fully integrated multi-standard UHF receiver front-end to be embedded in environmental data collection satellites is proposed. The circuit operates under the requirements of both SBCDA and the ARGOS 3. For that, the specifications of a multi-standard receiver front-end are firstly derived and then the implementation of a 70.4 dB voltage gain, 2.3 dB NF, 48 mW energy consumption, single-ended input and differential quadrature output receiver front-end in 130-nm CMOS standard technology is presented. The design is validated through post-layout simulation.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Carlos A.M. Costa Júnior, José B. Sales Filho, Gabriel C.L. Cunha, Diomadson R. Belfort, Sebastian Y.C. Catunda, Robson N. de Lima, Vincent P.M. Bourguet,