Nanoelectronic content-addressable memory

A novel nanoelectronic single-electron content addressable memory is designed and simulated. The proposed memory has three important building blocks: a storage block, a comparison block and an addressing block. These building blocks were built based on single-electron circuits such as Reset-Set latches, exclusive-or gates and a WTA neural network. Each one of the building blocks was separately adjusted to provide room temperature operation before being connected together. Some analyses concerning stability of each block and of the whole memory circuit were made. The nanoelectronic memory was successfully validated by simulation.