Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
547500 | Microelectronics Journal | 2013 | 11 Pages |
This paper presents a behavioral model for folded and interpolated analog-to-digital converters that takes into account non-idealities in the converter blocks. ADC performances are extracted by a Matlab/Simulink simulation to analyze how faults, considered as variations in the different parameters used for the description of each building block, affect the overall and local behaviors. This model also permits the evaluation of different test approaches (in an individual or comparative way). In this work we have developed a case study in which a structural Design-for-Test method has been preliminarily evaluated with good results. This methodology consists in sampling several internal points of the converter at the same time, so that, by computing relative variations among them, the presence of a defect can be detected.