| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 548124 | Microelectronics Reliability | 2016 | 8 Pages |
•High-current failure of electrical vias in thick-film technology was investigated.•Short-time high-current pulses were studied.•Hot spot occurs at via outlet, where metallization melts.•Measured and FEM-modeled voltage drops show good agreement.•FEM-Model is valid to simulate short time high-current behavior and failure of vias.
The high-current failure of electrical interconnects (through-metalized vias) manufactured in thick-film technology is investigated. A large number of vias were measured in a four-wire-setup by applying short time high-current pulses. The experimental conditions ensured that approximately half of the tested vias were destroyed during the tests. The high-current failure mechanism was identified to be a kind of a self-accelerating melting process. It was also implemented in a “Finite Element Method” (FEM)-model. The FEM-model delivered not only the time-dependent voltage drops over the through holes (which is proportional to the through hole resistance), but also the time-dependent temperature, conductivity, and current density distributions inside of the vias during current load. Input parameters for the model were material properties and sample geometries. Analyzed cross-section micrographs of destroyed vias and the temperature maxima received from the FEM-model agreed well. Furthermore, measured and modeled voltage drops during failure were compared and agreed also very well.
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