Article ID Journal Published Year Pages File Type
6942124 Integration, the VLSI Journal 2018 9 Pages PDF
Abstract
An all-digital Switched Capacitor (SC) DC-DC converter with a Switch Logic Controller and Optimizer (SLCO) is proposed in this paper. The SLCO achieves the maximum efficiency while keeping the output voltage ripples and load regulation at minimum values. Capacitance Modulation (CpM) and Pulse Frequency Modulation (PFM) are used to cover a wide dynamic range of load currents. Theoretical analysis and optimization algorithm are also presented to achieve the maximum efficiency. The SC converter is implemented in 0.13 µm CMOS technology using thick oxide I/O devices and achieves a maximum efficiency of 63% at power density of 0.095 W/mm2. The SC converter delivers up to 100 mA load current for an output voltage of 1 V from a 3.6 V nominal input voltage. Output voltage ripples and load regulation are less than 16 mV and 0.02%/mA, respectively.
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Physical Sciences and Engineering Computer Science Hardware and Architecture
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