An energy and area efficient 4:2 compressor based on FinFETs

In this paper, a new energy and area efficient 4:2 compressor is presented. The proposed compressor is designed efficiently based on multiplexer and XOR modules. The efficiency of the 4:2 compressor, as a fundamental arithmetic block, directly affects the performance of large multipliers. In the same way, the performance of multipliers impacts the efficiency of digital signal processing (DSP) units. On the other hand FinFET has been successfully utilized in industry as a substitute device for conventional bulk MOSFETs in sub 32 nm technologies, due to its superior gate control, lower short channel effects and higher scalability. All compressors in this work are simulated using Synopsis HSPICE with tri-gate FinFET technology. The proposed design has lower number of transistors, shorter propagation delay, lower power consumption, lower energy consumption and smaller area as compared to its conventional and state-of-the-art FinFET-based counterparts. According to the simulation results, the proposed design outperforms the previous designs, exhibiting significant improvements in terms of energy-efficiency and area.