Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6944840 | Microelectronics Journal | 2018 | 5 Pages |
Abstract
This paper introduces a very low static current CMOS level up shifter for low voltage single supply and high performance. The proposed low to high voltage level shifter is implemented using low threshold voltage transistors in 65â¯nm CMOS technology and based on differential topology. The shifter circuit was designed to be functional for an input voltage from 0.45 up to 1.2â¯V. Driving a 450â¯fF of capacitive load, the shifter's energy-delay product (EPD) is a 54% lower than a similar single supply level up shifter. Post-layout simulations, for every technological corner, temperature range from 25 up to 125â¯Â°C, operating input voltages and output capacitive loads (maximum of 740â¯fF), demonstrate the topology is fully functional without any impact on the static power consumption and the operating frequency of 500â¯MHz. Monte Carlo analysis shows the robustness of the proposed shifter within a 3Ï device mismatch.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
José-Carlos GarcÃa, Juan A. Montiel-Nelson, S. Nooshabadi,