| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 6945680 | Microelectronics Reliability | 2018 | 5 Pages |
Abstract
In this work, we have studied gate length (Lgate) scalability of Si0.55Ge0.45 Implant Free Quantum Well (IFQW) pFET with raised and embedded Si0.75Ge0.25 source/drain structures. Although embedded SiGe device shows higher Idsat which can be attributed to thinner Tinv (more scavenging of High-k interfacial layer), raised SiGe device has better short channel control than embedded SiGe device thanks to shallower junction depth. Raised SiGe device can scale down Lgate by 4â¯nm compared to embedded SiGe device while maintaining identical Ioff. This results in superior intrinsic delay in raised SiGe device.
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Authors
S. Yamaguchi, L. Witters, J. Mitard, G. Eneman, G. Hellings, A. Hikavyy, R. Loo, N. Horiguchi,