Effect of source and drain asymmetry on hot carrier degradation in vertical nanowire MOSFETs

Effects of source and drain (S/D) asymmetry on hot carrier degradation in vertical nanowire MOSFETs have been investigated with different nanowire radiuses. The S/D asymmetry causes different degree of hot carrier degradations between forward and reverse stresses. The actual stress voltage applied to the channel as a result of parasitic resistance and gate to junction overlap length is attributed to the cause of the asymmetric degradation. The narrower nanowire also suffers from worse hot carrier effects due to current crowding and geometric effects.