Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10364417 | Microelectronic Engineering | 2011 | 6 Pages |
Abstract
Schottky barrier SOI-MOSFETs incorporating a La2O3/ZrO2 high-k dielectric stack deposited by atomic layer deposition are investigated. As the La precursor tris(N,Nâ²-diisopropylformamidinato) lanthanum is used. As a mid-gap metal gate electrode TiN capped with W is applied. Processing parameters are optimized to issue a minimal overall thermal budget and an improved device performance. As a result, the overall thermal load was kept as low as 350, 400 or 500 °C. Excellent drive current properties, low interface trap densities of 1.9 Ã 1011 eVâ1 cmâ2, a low subthreshold slope of 70-80 mV/decade, and an ION/IOFF current ratio greater than 2 Ã 106 are obtained.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
C. Henkel, S. Abermann, O. Bethge, G. Pozzovivo, P. Klang, M. Stöger-Pollach, E. Bertagnolli,