Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
4970949 | Microelectronic Engineering | 2017 | 5 Pages |
â¢A damascene process to fabricate embedded gold micro-and nano-structures at the same time.â¢Study of the material removal rate (MRR) and the selectivity on both gold and SiO2 as function of different CMP parameters.â¢Effect of CMP on gold surface roughness.
In this work, we propose a damascene process to fabricate embedded gold micro- and nano-structures at the same time. We present a systematic study of the material removal rate (MRR) and the selectivity on both gold and silicon dioxide. The embedded microstructures are 2 μm wide and 60 nm deep, while the nanostructures widths vary from 70 nm to 500 nm for a 50 nm depth. Moreover, we highlight the contribution of the CMP in polishing the surfaces of gold films. Morphological characterizations are performed using mechanical profilometry, Atomic Force Microscopy (AFM), and Scanning Electron Microscopy (SEM). MRR and selectivity are evaluated as a function of time, applied pressure, platen rotation speed, and slurry flow.
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