Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
539058 | Microelectronic Engineering | 2015 | 4 Pages |
•We discuss the concept of Junction Barrier Schottky diodes.•We perform dopant imaging of implanted p+ regions.•We perform numerical device simulations for application voltages of 3.3 kV (traction).
In order to avoid a premature breakdown and high leakage-currents of Silicon Carbide (SiC) unipolar Schottky power diodes the Schottky-contact area needs to be shielded from the high electric field inside the device. This can be achieved by the application of a Junction-Barrier Schottky (JBS) device architecture where highly doped p+ regions serve as a shielding structure at the anode side of the device when operated under reverse bias-voltage conditions. In contrast, the active area consumption of this p+-type regions has a negative effect on the differential resistance. To design those p+-shields it is inevitable to compare simulated dopant profiles with those manufactured by ion implantation. Hence, in this contribution we performed SPM-based measurements to image the p+-doped areas. As complementary measurement also secondary electron potential contrast (SEPC) was performed.
Graphical abstractFigure optionsDownload full-size imageDownload as PowerPoint slide