Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
539483 | Microelectronic Engineering | 2012 | 6 Pages |
In order to realize the manufacturing and cost benefits of bumpless wafer-on-wafer (WOW) technology for the advent of 3D stacked devices, creation of through silicon vias (TSV) spanning all layers of the fully formed semiconductor device must be realized. This is particularly challenging for logic devices with multiple interconnect layers comprised of various dielectric films including low k. This paper, for the first time, demonstrates the manufacture of TSV’s through such device’s multi-layered dielectric and silicon, simultaneously.
Graphical abstractFigure optionsDownload full-size imageDownload as PowerPoint slideHighlights► Creation of via last TSV through entire backend of advanced logic device. ► Modular toolset enables creation of complex TSV through logic device backend structure. ► Hurdle overcome to prove wafer on wafer (WOW) stacking feasibility for logic devices.