Article ID Journal Published Year Pages File Type
539890 Microelectronic Engineering 2010 4 Pages PDF
Abstract

For 45 nm and beyond microelectronics technology nodes, the integration of porous low dielectric constant (low-k) materials is now required to reach integrated dielectric constant values lower than 2.7. However, porous low-k materials have lower mechanical strength in comparison with traditional dense materials and are also affected by chemical diffusion through the interconnected porosity during the various integration processes. Different types of plasma post-treatments which lead to surface modification of the porous low-k material with possible formation of a top surface layer, change of surface structure and “pore sealing” effect were applied. Highly sensitive instruments for mechanical investigation of thin layers, such as the Ultra Nano Hardness Tester (UNHT) and Nano Scratch Tester (NST) were applied for characterization of the effect of the plasma post-treatments on the mechanical behavior of a porous low-k material. Preliminary results are presented and discussed in this paper.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
Authors
, , , , ,