Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
540086 | Microelectronic Engineering | 2007 | 5 Pages |
Abstract
This paper describes the fabrication steps developed to pattern nano scale features on thin silica wafers. The optimization of e-beam exposure dose is presented. The use of a chrome layer on top of the silica wafer implies higher doses to crosslink the negative NEB22 resist, but the results show a very large window process. Specific etching processes have been developed. It is demonstrated how the micro-trenching and CD bias are reduced. Thanks to the optimization of both the exposure dose during e-beam lithography and the plasma dry etch steps, features with a resolution as low as 30 nm have been achieved.
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Authors
P. Voisin, M. Zelsmann, C. Gourgon, J. Boussey,