Article ID Journal Published Year Pages File Type
540476 Microelectronic Engineering 2011 4 Pages PDF
Abstract

In this work it is shown that film stress in the gate stack of TANOS NAND memories plays an important role for cell device performance and reliability. Tensile stress induced by a TiN metal gate deteriorates TANOS cell retention compared to TaN gate material. However, the erase saturation level as well as cell endurance is improved by the use of a TiN gate. This trade-off between retention and erase saturation for TANOS cells is elaborated in detail.

Grabhical abstractFilm stress in the gate stack of TANOS NAND memories plays an important role for cell device performance and reliability. 48nm TANOS Flash memory cells with TiN and TaN metal gates capped by WN or poly-Si were compared with respect to film stress and device performance. A trade-off between retention and erase saturation was observed. For instance, tensile stress induced by a TiN metal gate deteriorates TANOS cell retention compared to TaN gate material (figure left). On the other hand, the erase saturation level is improved by the use of a TiN gate (figure right).Figure optionsDownload full-size imageDownload as PowerPoint slideHighlights► Interface and film stress effects result in a trade-off between retention and erase saturation for TANOS cells. ► Tensile stress induced by TiN metal gates deteriorates TANOS cell retention compared to TaN gate material. ► The erase saturation level as well as cell endurance is improved by the use of a TiN gate. ► The same behavior was observed for the additional tensile stress due to the poly-Si capping.

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