Interface states characterization in heterojunction solar cells from CV–GV measurements and modeling

A new method is proposed to extract interface states density Dit at the hydrogenated amorphous/crystalline silicon interfaces (aSi:H/cSi) of heterojunction solar cells – HET. This technique based on CV and GV measurements consists in adapting standard electrical Dit models for MOS structures to the specific case of HET solar cells. In particular, a parasitic conductance is introduced to account for the high leakage current of the diode in the forward regime. The relevance and accuracy of such an analytical model is then demonstrated by comparison with experimental results and with more complex numerical approaches. Finally, this technique enables us to demonstrate the high quality of the interface of HET solar cells which exhibit Dit levels below 1011 defects per cm2.

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