Mechanical characterization of polymer passivation layer in semiconductor applications using IIT and FEA

Various kinds of polymer passivation and associated equipment have been developed for inter-level insulation, buffering, and αα-rays shielding layers in semiconductor devices. Among these, photosensitive polyimide (PSPI) has thermal and dielectric characteristics that are highly compatible with the requirements of recent devices, and its applications have been increasing. However, PSPI passivation, whose mechanical properties are strongly governed by processing, is implicated in many physical failure modes. It is very difficult to characterize PSPI via fracture mechanics because it behaves viscoelastically and is structurally entangled with variously processed ceramic oxides such as SiN and SiON; in addition, its mechanical characteristics involve some ambiguous fracture modes. In this study, we compare the chip surface toughness of several devices using micro-instrumented indentation testing (MIIT). To do this, we defined a collapse propagation rate in viscoelastic polymer–ceramic composite thin film and verified this parameter by empirically reproducing phenomena involved in chip surface collapse. We used ANSYS to simulate the elastoplastic behavior beneath the indenter tip as the PSPI layer was varied. To discuss all these issues, we obtained by nano-instrumented indentation testing (NIIT) mechanical properties that are closely related to fracture behavior. This study gives some guidance for checking the mechanical resistance of the chip surface to filler-induced attack and thus for developing new technologies for semiconductor process integration.