Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
540691 | Microelectronic Engineering | 2008 | 4 Pages |
Abstract
Deposited on a porous a-SiOC:H intermetal dielectric (IMD), a dense a-SiOC:H cap was successfully integrated in a C45 dual damascene architecture. The paper demonstrates that, stopping the CMP with around 10 nm of the cap left, the IMD integrity is preserved. As a consequence, a 3.5% decrease in RC delay, a 7.3% decrease in IMD integrated k-value and an increase of the time to failure by a 100 factor are reached relative to direct CMP. The cap also allowed to achieve straight lines and to improve the lines height uniformity as if CMP stopped on the IMD.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
L.L. Chapelon, H. Chaabouni, G. Imbert, P. Brun, M. Mellier, K. Hamioud, M. Vilmay, A. Farcy, J. Torres,